ARM条件码与CPSR标志位的关系

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ARM



体系中,所有



ARM



指令均可条件执行,设置了一些条件执行码,但这些条件码对应设置



CPSR



中的



Z, C, N, V



标志位:



l







0000 = EQ – Z set (equal)








l







0001 = NE – Z clear (not equal)








l







0010 = CS – C set (unsigned higher or same)








l







0011 = CC – C clear (unsigned lower)








l







0100 = MI – N set (negative)








l







0101 = PL – N clear (positive or zero)








l







0110 = VS – V set (overflow)








l







0111 = VC – V clear (no overflow)








l







1000 = HI – C set and Z clear (unsigned higher)








l







1001 = LS – C clear or Z set (unsigned lower or same)








l







1010 = GE – N set and V set, or N clear and V clear (greater or equal)








l







1011 = LT – N set and V clear, or N clear and V set (less than)








l







1100 = GT – Z clear, and either N set and V set, or N clear and V clear (greater than)








l







1101 = LE – Z set, or N set and V clear, or N clear and V set (less than or equal)








l







1110 =

AL

– always








l







1111 = NV – never








怎样去理解这些设置呢?拿





1001 = LS – C clear or Z set (unsigned lower or same)









来说:







是为什么



LS



就对应



C clear and Z set



。看下面的例子:



MOV R0, #5



MOV R1, #6



CMP R0, R1




MOVLS R2, R0 ; if R0 < R1








将小值存入



R2







在这个例子中,



MOVLS



能够正确执行的条件



C=0 and z=1



成立,是通过



CMP



设置了,看看



reference manual



中的



CMP



设置规则:




C flag:For a subtraction, including the comparison instruction





CMP





, C is set to 0 if the subtraction produced a borrow (that is, an unsigned underflow), and to 1 otherwise.









Z flag: Is set to 1 if the result of the instruction is zero (which often indicates an

equal

result from





a comparison), and to 0 otherwise.









这就不难理解了




LS




与标志位的对应了。下面给出






标志位的设置规则,便于我们从中推导上面每一个例子。




In either case, the new condition code flags (after the instruction has been executed) usually mean:






N





Is set to bit 31 of the result of the instruction. If this result is regarded as a two’s complement





signed integer, then N = 1 if the result is negative and N = 0 if it is positive or zero.






Z





Is set to 1 if the result of the instruction is zero (which often indicates an

equal

result from





a comparison), and to 0 otherwise.






C





Is set in one of four ways:





• For an addition, including the comparison instruction





CMN





, C is set to 1 if the addition





produced a carry (that is, an unsigned overflow), and to 0 otherwise.





• For a subtraction, including the comparison instruction





CMP





, C is set to 0 if the





subtraction produced a borrow (that is, an unsigned underflow), and to 1 otherwise.









• For non-addition/subtractions that incorporate a shift operation, C is set to the last bit





shifted out of the value by the shifter.





• For other non-addition/subtractions, C is normally left unchanged (but see the





individual instruction descriptions for any special cases).






V





Is set in one of two ways:





• For an addition or subtraction, V is set to 1 if signed overflow occurred, regarding the





operands and result as two’s complement signed integers.





• For non-addition/subtractions, V is normally left unchanged (but see the individual





instruction descriptions for any special cases).











来看下



GT (signed greater)



标志位的设置





:



CMP -5, -4 ;



相减为不等于



0



,为负值,且有下溢出,所以



N=1, V=1







CMP 6,5 ;



相减后值为



1







N=0



),正值且无下溢(



V=0







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