三输入与非门的版图
1
、版图
2
、
Spice
网表文件
* Circuit Extracted by Tanner Research’s L-Edit Version 13.00 / Extract Version 13.00 ;
* TDB File:
G:\bantu\NAND3.1.tdb
* Cell:
Cell0
Version 1.36
* Extract Definition File:
C:\Users\tbmei\Documents\Tanner EDA\Tanner Tools v13.0\L-Edit and
LVS\SPR\Lights\Layout\lights.ext
* Extract Date and Time:
06/09/2014 – 18:17
.include “G:\bantu\ml5_20.md”
* Warning:
Layers with Unassigned FRINGE Capacitance.
*
*
* NODE NAME ALIASES
*
1 = vdd (0 , 60)
*
2 = Gnd (0 , 0)
*
3 = OUT (14 , 20)
*
4 = C (40 , 31)
*